共 50 条
- [1] FPGA implementation of a high-resolution time-to-digital converter [J]. 2007 IEEE NUCLEAR SCIENCE SYMPOSIUM CONFERENCE RECORD, VOLS 1-11, 2007, : 504 - 507
- [2] A calibration technique for a high-resolution flash time-to-digital converter [J]. 2004 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL 1, PROCEEDINGS, 2004, : 253 - 256
- [3] A high-resolution flash time-to-digital converter and calibration scheme [J]. INTERNATIONAL TEST CONFERENCE 2004, PROCEEDINGS, 2004, : 1148 - 1157
- [4] A high-resolution and fast-conversion time-to-digital converter [J]. PROCEEDINGS OF THE 2003 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL I: ANALOG CIRCUITS AND SIGNAL PROCESSING, 2003, : 37 - 40
- [8] A High-Resolution Time-to-Digital Converter Based on Parallel Delay Elements [J]. 2012 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS 2012), 2012,
- [9] HIGH-RESOLUTION TIME-TO-DIGITAL CONVERTERS [J]. NUCLEAR INSTRUMENTS & METHODS IN PHYSICS RESEARCH SECTION A-ACCELERATORS SPECTROMETERS DETECTORS AND ASSOCIATED EQUIPMENT, 1992, 315 (1-3): : 411 - 414
- [10] A New High-resolution, Temperature-compensated Cyclic Time-to-Digital Converter [J]. ISOCC: 2008 INTERNATIONAL SOC DESIGN CONFERENCE, VOLS 1-3, 2008, : 82 - 85