Effects of two-step annealing on the characteristics of the low temperature polycrystalline silicon thin film transistors

The effects of two-step annealing on the device characteristics of polysilicon thin film transistors are investigated. The device characteristics such as drain current, mobility and threshold voltage of the low temperature furnace annealed polysilicon thin film transistors is improved considerably due to the reduction of in-grain defects by post-laser annealing. The post-high temperature furnace annealing (900 degrees C) on the low temperature furnace annealed devices does not improve the device performance of polysilicon thin film transistors, due to the facts the annealing temperature of 900 degrees C is much lower than the melting temperature (greater than or equal to 1300 degrees C) of polysilicon. We have also found that the activation energy and hydrogen passivation rate in two-step annealed polysilicon thin film transistors is also improved significantly by the reduction of tail states due to the elimination of in-grain defects.