Network processor performance evaluation framework

被引:0
|
作者
Shan Zheng [1 ]
Zhao Rong-cai [1 ]
Xie Kang-min [1 ]
机构
[1] Informat Engn Univ, Dept Comp Sci, Zhengzhou, Henan, Peoples R China
关键词
D O I
暂无
中图分类号
TN [电子技术、通信技术];
学科分类号
0809 ;
摘要
Computer networks provide an increasing number of services that require complex processing of packets, for example firewalls, load balancing, network storage, and TCP/IP offloading. Such services require the use of powerful network processors to provide the necessary performance and flexibility. But NPs also introduce new challenges. It is important to study the performance of NP system so that one can take full advantage of NP resources to achieve the required performance for a given application. It is therefore desirable to develop a framework for analyzing performance of NP-based applications. The Framework divides the network processor system into four levels, and incorporates petri net, ADAG and a new analysis method- "line space" to evaluate NP-based system performance, which simplifies the complexity of multilevel parallel system performance evaluation and insures its efficiency and precision. We apply our methodology to an Intel's reference design, and show that the analytical results using our method match the experimental results from actual implementation.
引用
收藏
页码:451 / +
页数:3
相关论文
共 50 条
  • [31] Performance Evaluation of a Reconfigurable Instruction Set Processor
    Mehdipour, Farhad
    Noori, Hamid
    Honda, Hiroaki
    Inoue, Koji
    Murakami, Kazuaki
    [J]. ISOCC: 2008 INTERNATIONAL SOC DESIGN CONFERENCE, VOLS 1-3, 2008, : 184 - +
  • [32] BLAS on the trident processor: Implementation and performance evaluation
    Soliman, MI
    Sedukhin, SG
    [J]. COMPUTERS AND THEIR APPLICATIONS, 2003, : 359 - 364
  • [33] Performance evaluation of a parameterized fuzzy processor (PFP)
    Chen, BT
    Chen, YS
    Hsu, WH
    [J]. FUZZY SETS AND SYSTEMS, 1996, 81 (03) : 293 - 309
  • [34] Design and Performance Evaluation of Data Flow Processor
    Su, Wenjun
    [J]. 2014 9TH INTERNATIONAL CONFERENCE ON COMMUNICATIONS AND NETWORKING IN CHINA (CHINACOM), 2014, : 578 - 582
  • [35] BRUNO: A High Performance Traffic Generator for Network Processor
    Antichi, Gianni
    Di Pietro, Andrea
    Ficara, Domenico
    Giordano, Stefano
    Procissi, Gregorio
    Vitucci, Fabio
    [J]. PROCEEDINGS OF THE 2008 INTERNATIONAL SYMPOSIUM ON PERFORMANCE EVALUATION OF COMPUTER AND TELECOMMUNICATION SYSTEMS, 2008, : 526 - 533
  • [36] Design and implementation of a high performance network security processor
    Wang, Haixin
    Bai, Guoqiang
    Chen, Hongyi
    [J]. INTERNATIONAL JOURNAL OF ELECTRONICS, 2010, 97 (03) : 309 - 325
  • [37] Implementation and evaluation of a dynamically routed processor operand network
    Gratz, Paul
    Sankaralingam, Karthikeyan
    Hanson, Heather
    Shivakumar, Premkishore
    McDonald, Robert
    Keckler, Stephen W.
    Burger, Doug
    [J]. NOCS 2007: FIRST INTERNATIONAL SYMPOSIUM ON NETWORKS-ON-CHIP, PROCEEDINGS, 2007, : 7 - +
  • [38] The impact of parallel and multithread mechanism on network processor performance
    Wu, Chunqing
    Shi, Xiangquan
    Yang, Xuejun
    Su, Jinshu
    [J]. GCC 2005: FIFTH INTERNATIONAL CONFERENCE ON GRID AND COOPERATIVE COMPUTING, PROCEEDINGS, 2006, : 236 - +
  • [39] Design of a High Performance Traffic Generator on Network Processor
    Antichi, Gianni
    Di Pietro, Andrea
    Ficara, Domenico
    Giordano, Stefano
    Procissi, Gregorio
    Vitucci, Fabio
    [J]. 11TH EUROMICRO CONFERENCE ON DIGITAL SYSTEM DESIGN - ARCHITECTURES, METHODS AND TOOLS : DSD 2008, PROCEEDINGS, 2008, : 438 - 441
  • [40] Calipers: A Criticality-aware Framework for Modeling Processor Performance
    Golestani, Hossein
    Sen, Rathijit
    Young, Vinson
    Gupta, Gagan
    [J]. PROCEEDINGS OF THE 36TH ACM INTERNATIONAL CONFERENCE ON SUPERCOMPUTING, ICS 2022, 2022,