Interpolation based Direct Digital Frequency Synthesis for wireless communications

被引：0
|
作者：
Eltawil, AM [1 ]
Daneshrad, B [1 ]
机构：
[1] Univ Calif Los Angeles, Dept Elect Engn, Wireless Integrated Syst Lab, Los Angeles, CA 90095 USA
来源：
WCNC 2002: IEEE WIRELESS COMMUNICATIONS AND NETWORKING CONFERENCE RECORD, VOLS 1 & 2 | 2002年
关键词：
D O I：
暂无
中图分类号：
TP [自动化技术、计算机技术];
学科分类号：
0812 ;
摘要：
In this paper, a compact architecture for direct digital frequency synthesis (DDFS) is presented. It uses a smaller lookup table for sine and cosine functions compared to existing architectures, with minimal hardware overhead. The computation of the sinusoidal values is performed by a parabolic interpolation structure, thus only interpolation coefficients need to be stored in the Read-Only Memory (ROM). A DDFS with 64 dBc SFDR, 10-bit output resolution and 32 bit phase accumulator requires only 104 bits of ROM storage. The ROM size is consistently less than 1 Kbits for SFDR up to 85 dBc.
引用
收藏
页码：73 / 77
页数：3
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