A 2.4 GHz 4 mW Integer-N Inductorless RF Synthesizer

被引：104

作者：

Kong, Long ^{[1
]}

Razavi, Behzad ^{[1
]}

机构：

[1] Univ Calif Los Angeles, Dept Elect Engn, Los Angeles, CA 90095 USA

来源：

IEEE JOURNAL OF SOLID-STATE CIRCUITS | 2016年 / 51卷 / 03期

关键词：

Frequency synthesizer; harmonic trap; phase-locked loop (PLL); reference spur; voltage-controlled oscillator (VCO); Delta modulator; PHASE-NOISE; JITTER;

D O I：

10.1109/JSSC.2015.2511157

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

The high phase noise of ring oscillators has generally discouraged their use in RF synthesis. This paper introduces an integer-N synthesizer that employs a type-I loop to achieve a wide bandwidth, allowing the use of ring oscillators, and a master-slave sampling loop filter along with harmonic traps to suppress spurs. A 2.4 GHz prototype fabricated in 45 nm digital CMOS technology provides a loop bandwidth of 10 MHz and a spur level of -65 dBc. The phase noise is -114 dBc/Hz at 1 MHz offset.

引用

页码：626 / 635

页数：10

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