共 50 条
- [32] Design and power optimization of CMOS RIF blocks operating in the moderate inversion region SBCCI 2005: 18TH SYMPOSIUM ON INTEGRATED CIRCUITS AND SYSTEMS DESIGN, PROCEEDINGS, 2005, : 127 - 132
- [33] Automated Design of Analog Circuits Based on Parallel Trust Region Bayesian Optimization 2024 INTERNATIONAL SYMPOSIUM OF ELECTRONICS DESIGN AUTOMATION, ISEDA 2024, 2024, : 187 - 192
- [34] Automated design method for parameters optimization of CMOS analog circuits based on adaptive genetic algorithm ASICON 2007: 2007 7TH INTERNATIONAL CONFERENCE ON ASIC, VOLS 1 AND 2, PROCEEDINGS, 2007, : 1217 - 1220
- [35] Optimal sizing of CMOS analog circuits using gravitational search algorithm with particle swarm optimization International Journal of Machine Learning and Cybernetics, 2017, 8 : 309 - 331
- [37] Design and analysis of CMOS analog signal processing circuits by means of a graphical MOST model Wallinga, Hans, 1600, (24):
- [38] Analog CMOS circuits implementing neural segmentation model based on symmetric STDP learning NEURAL INFORMATION PROCESSING, PART II, 2008, 4985 : 117 - +
- [39] Noise optimization of charge amplifier with MOS input transistor working in moderate inversion region 2005 IEEE NUCLEAR SCIENCE SYMPOSIUM CONFERENCE RECORD, VOLS 1-5, 2005, : 960 - 964
- [40] Concepts and optimization of CMOS LC_VCO circuits via geometric program 2008 INTERNATIONAL CONFERENCE ON DESIGN & TECHNOLOGY OF INTEGRATED SYSTEMS IN NANOSCALE, 2008, : 102 - +