Automated Design of Analog Circuits Based on Parallel Trust Region Bayesian Optimization

被引:0
|
作者
Wong, Peng [1 ]
Lyu, Ruiyu [1 ]
Wang, Chunxi [2 ]
Chen, Jiale [1 ]
Jiang, Linfeng [3 ]
Lan, Cunqing [1 ]
Bi, Zhaori [1 ]
Yan, Changhao [1 ]
机构
[1] Fudan Univ, Microelect Dept, State Key Lab Integrated Chips & Syst, Shanghai, Peoples R China
[2] Huawei Technol Co Ltd, Shenzhen, Peoples R China
[3] Southeast Univ, Natl ASIC Syst Engn Ctr, Nanjing, Peoples R China
基金
中国国家自然科学基金;
关键词
Automatic optimization for analog integrated circuits; Parallel Bayesian optimization; Trust regions; Dynamic allocation Multi-Armed Bandit Algorithm;
D O I
10.1109/ISEDA62518.2024.10617503
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Traditional optimization algorithms suffer performance decline in high-dimensional optimization problems, such as analog circuit design optimization. Adapting existing algorithms to parallel computing environments is a critical challenge. Therefore we propose a parallel Trust Region Bayesian Optimization(TuRBO) algorithm. This algorithm operates in parallel on different trust regions, utilizing a Multi-Armed Bandit algorithm for intelligent sampling to accelerate parameter optimization. Circuit experimental results demonstrate the advantages of this algorithm. Compared to Differential Evolution, Particle Swarm Optimization, Naive Bayesian, High-Dimensional Batch Bayesian Processing, and TuRBO algorithms, the circuit performance achieves improvements ranging from 3.7% to 98.2%. Compared to TuRBO, it achieves acceleration ratios in terms of iteration numbers ranging from 1.19x to 1.31x, and in terms of algorithm runtime ranging from 1.21x to 2.25x.
引用
收藏
页码:187 / 192
页数:6
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