Automated Design of Analog Circuits Based on Parallel Trust Region Bayesian Optimization

被引:0
|
作者
Wong, Peng [1 ]
Lyu, Ruiyu [1 ]
Wang, Chunxi [2 ]
Chen, Jiale [1 ]
Jiang, Linfeng [3 ]
Lan, Cunqing [1 ]
Bi, Zhaori [1 ]
Yan, Changhao [1 ]
机构
[1] Fudan Univ, Microelect Dept, State Key Lab Integrated Chips & Syst, Shanghai, Peoples R China
[2] Huawei Technol Co Ltd, Shenzhen, Peoples R China
[3] Southeast Univ, Natl ASIC Syst Engn Ctr, Nanjing, Peoples R China
基金
中国国家自然科学基金;
关键词
Automatic optimization for analog integrated circuits; Parallel Bayesian optimization; Trust regions; Dynamic allocation Multi-Armed Bandit Algorithm;
D O I
10.1109/ISEDA62518.2024.10617503
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Traditional optimization algorithms suffer performance decline in high-dimensional optimization problems, such as analog circuit design optimization. Adapting existing algorithms to parallel computing environments is a critical challenge. Therefore we propose a parallel Trust Region Bayesian Optimization(TuRBO) algorithm. This algorithm operates in parallel on different trust regions, utilizing a Multi-Armed Bandit algorithm for intelligent sampling to accelerate parameter optimization. Circuit experimental results demonstrate the advantages of this algorithm. Compared to Differential Evolution, Particle Swarm Optimization, Naive Bayesian, High-Dimensional Batch Bayesian Processing, and TuRBO algorithms, the circuit performance achieves improvements ranging from 3.7% to 98.2%. Compared to TuRBO, it achieves acceleration ratios in terms of iteration numbers ranging from 1.19x to 1.31x, and in terms of algorithm runtime ranging from 1.21x to 2.25x.
引用
收藏
页码:187 / 192
页数:6
相关论文
共 50 条
  • [21] PyCO: A Parallel Genetic Algorithm Optimization Tool for Analog Circuits
    Rabuske, Taimur G.
    Pinheiro, Renan B.
    Fernandes, Jorge
    Rodrigues, Cesar R.
    2012 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS 2012), 2012,
  • [22] A methodology for efficient design of analog circuits using an automated simulation based synthesis tool
    Kundu, Amal Kumar
    Dastidar, Tathagato Rai
    Bhattacharyya, Tarun Kanti
    Ray, Partha
    PROCEEDINGS OF 2008 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-10, 2008, : 732 - +
  • [23] Automated Design and Optimization of Circuits in Emerging Technologies
    Thakker, Rajesh A.
    Sathe, Chaitanya
    Sachid, Angada B.
    Baghini, Maryam Shojaei
    Rao, V. Ramgopal
    Patil, Mahesh B.
    PROCEEDINGS OF THE ASP-DAC 2009: ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE 2009, 2009, : 504 - 509
  • [24] AUTOMATED DESIGN OPTIMIZATION OF INTEGRATED SWITCHING CIRCUITS
    ESSL, DVJ
    MITTERER, RW
    REHN, BF
    DOMITROWICH, JR
    IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1974, SC 9 (01) : 14 - 20
  • [25] A class of trust-region methods for parallel optimization
    Hough, PD
    Meza, JC
    SIAM JOURNAL ON OPTIMIZATION, 2002, 13 (01) : 264 - 282
  • [26] LIMSoft: Automated tool for design and test integration of analog circuits
    BenHamida, N
    Saab, K
    Marche, D
    Kaminska, B
    Quesnel, G
    INTERNATIONAL TEST CONFERENCE 1996, PROCEEDINGS, 1996, : 571 - 580
  • [27] A Powerful Optimization Tool for Analog Integrated Circuits Design
    Kubar, Miloslav
    Jakovenko, Jiri
    RADIOENGINEERING, 2013, 22 (03) : 921 - 931
  • [28] DESIGN STRATEGIES VERSUS NUMERICAL OPTIMIZATION FOR ANALOG CIRCUITS
    GOFFART, B
    LITSIOS, J
    DEGRAUWE, M
    1989 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-3, 1989, : 1119 - 1122
  • [29] Batch Bayesian Optimization via Multi-objective Acquisition Ensemble for Automated Analog Circuit Design
    Lyu, Wenlong
    Yang, Fan
    Yan, Changhao
    Zhou, Dian
    Zeng, Xuan
    INTERNATIONAL CONFERENCE ON MACHINE LEARNING, VOL 80, 2018, 80
  • [30] A surrogate-based parallel optimization of analog circuits using multi-acquisition functions
    Du, Sichun
    Liu, Haiyang
    Hong, Qinghui
    Wang, Chunhua
    AEU-INTERNATIONAL JOURNAL OF ELECTRONICS AND COMMUNICATIONS, 2022, 146