A 60 GHz Low Noise Amplifier with Built-in Linearizer

被引:0
|
作者
Hsieh, Chun-An [1 ]
Lin, Yu-Hsuan
Hsiao, Yuan-Hung
Wang, Huei
机构
[1] Natl Taiwan Univ, Dept Elect Engn, Taipei 10617, Taiwan
关键词
CMOS; low noise amplifier (LNA); high linearity; monolithic microwave integrated circuit (MMIC);
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A 57 to 66 GHz low noise amplifier (LNA) with built-in linearizer using 65-nm CMOS technology is presented in this paper. The source-sensed derivative superposition technique is applied to improve the linearity of the LNA at high frequency. The measurement results show that linearized LNA achieves 24 dB gain and 4.5 dB noise figure in the band of interest. Based on the proposed methodology, the improvement of IM3 is 14 dB at 60 GHz. This high linearity LNA is suitable for high data rate transmission application.
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页数:3
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