Poster: Design Consideration of 60 GHz Low Power Low-noise Amplifier in 65 nm CMOS

被引:0
|
作者
Chen, Zhe [1 ]
Gao, Hao [1 ]
van Dommele, Rainier [1 ]
Milosevic, Dusan [1 ]
Baltus, Peter G. M. [1 ]
机构
[1] Eindhoven Univ Technol, Dept Elect Engn, Mixed Signal Microelect Grp, Eindhoven, Netherlands
关键词
low power; LNA; capacitive cross coupling; 60; GHz; current reuse;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper presents a design of fully differential low-noise amplifier (LNA) used for 60 GHz low power wireless communication in 65 nm CMOS technology. The proposed LNA consists of an input stage employing capacitive cross-coupling technique and an gain stage using current-reuse techniques. The simulated amplifier achieves both input and output matching better than -15dB, a forward gain of 15 dB, a noise figure of 4.7 dB, an input IP3 of -14dBm and the power consumption is 5 mW. The author also proposed a simple design method based on "black box" approach, which can be used for low power LNA design.
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页数:4
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