Etching through silicon wafer in inductively coupled plasma

被引：19
|
作者：
Franssila, S
Kiihamäki, J
Karttunen, J
机构：
[1] Aalto Univ, Ctr Microelect, FIN-02015 Helsinki, Finland
[2] VTT Microelect Ctr, FIN-02044 Espoo, Finland
来源：
MICROSYSTEM TECHNOLOGIES-MICRO-AND NANOSYSTEMS-INFORMATION STORAGE AND PROCESSING SYSTEMS | 2000年 / 6卷 / 04期
关键词：
D O I：
10.1007/s005420050183
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
Inductively coupled plasma reactor (ICP) has been used to etch holes, trenches and other shapes completely through 380 and 525 mu m thick silicon wafers. Bosch/STS process of gas flow pulsing with SF6 etch step and C4F8 sidewall passivation step was employed. Etch rate reduction due to aspect ratio dependence and pattern size and shape effects have been explored. Etch stop has been studied both on bulk and SOI wafers. Notching effect was observed for high aspect ratio features but it was absent in large, low aspect ratio features. Aluminum etch stop layer has been shown to eliminate notching.
引用
收藏
页码：141 / 144
页数：4
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