Chain-Mapping for mesh based Network-on-Chip architecture

被引：16

作者：

Tavanpour, Misagh ^{[1
]}

Khademzadeh, Ahmad ^{[2
]}

Janidarmian, Majid ^{[1
]}

机构：

[1] Islamic Azad Univ Tehran, Sci & Res Branch, CE Dept, Tehran, Iran

[2] Iran Telecom Res Ctr, Tehran, Iran

来源：

IEICE ELECTRONICS EXPRESS | 2009年 / 6卷 / 22期

关键词：

Chain-Mapping; Network-on-Chip; mapping algorithm; bandwidth; mesh;

D O I：

10.1587/elex.6.1535

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Mapping of IP cores on a given platform is one of the three aspects of Network-on-Chip design. Mapping priority of IP cores is mostly based on a single communication in previously proposed algorithms. In this paper we present Chain-Mapping (CHMAP), as an algorithm for mapping cores onto a mesh-based Network-on-Chip architecture. The main aim of the algorithm is to produce chains of connected cores in order to introduce a new method to prioritize IP core which helps us to have more efficient mapping. Proposed algorithm and previous researches were compared on two real applications, i.e. Video object plan decoder (VOPD) and MPEG-4 and results were

引用

页码：1535 / 1541

页数：7

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