共 50 条
- [1] A VHDL-based design methodology for asynchronous circuits [J]. WSEAS Transactions on Circuits and Systems, 2010, 9 (05): : 315 - 324
- [2] Accurate VHDL-based simulation of ΣΔ modulators [J]. PROCEEDINGS OF THE 2003 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL IV: DIGITAL SIGNAL PROCESSING-COMPUTER AIDED NETWORK DESIGN-ADVANCED TECHNOLOGY, 2003, : 632 - 635
- [4] A VHDL-based simulation methodology for estimating switching activity in static CMOS circuits [J]. ELEVENTH ANNUAL IEEE INTERNATIONAL ASIC CONFERENCE - PROCEEDINGS, 1998, : 295 - 300
- [5] VHDL-based simulation environment for proteo NoC [J]. SEVENTH IEEE INTERNATIONAL HIGH-LEVEL DESIGN VALIDATION AND TEST WORKSHOP, PROCEEDINGS, 2002, : 1 - 6
- [6] VHDL-based distributed fault simulation using savant [J]. PROCEEDINGS OF THE IEEE 1998 NATIONAL AEROSPACE AND ELECTRONICS CONFERENCE, 1998, : 565 - 573
- [7] Towards VHDL-Based Design of Reversible Circuits Work in Progress Report [J]. REVERSIBLE COMPUTATION, RC 2017, 2017, 10301 : 102 - 108
- [8] Challenges in RF analog integrated circuits [J]. 2001 4TH INTERNATIONAL CONFERENCE ON ASIC PROCEEDINGS, 2001, : 800 - 805
- [9] Generalized Simulation-Based Posynomial Model Generation for Analog Integrated Circuits [J]. Analog Integrated Circuits and Signal Processing, 2004, 40 : 193 - 203