BDD based synthesis of symmetric functions with full Path-Delay Fault testability

被引：0
|
作者：
Shi, JH [1 ]
Fey, G [1 ]
Drechsler, R [1 ]
机构：
[1] Univ Bremen, Inst Comp Sci, Bremen, Germany
来源：
ATS 2003: 12TH ASIAN TEST SYMPOSIUM, PROCEEDINGS | 2003年
关键词：
D O I：
暂无
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
A new technique for synthesizing totally symmetric Boolean functions is presented that achieves complete robust path delay fault testability. BDDs are usedfor the synthesis step. Only one additional input and one inverter are needed to achieve 100% Path Delay Fault (PDF) testability. The size of the circuit is guaranteed to he at niost quadratic in the number of inputs. The test vectors for any PDF can be generated in linear time. Experimental results underline the efficiency, of the technique. In contrast to previous approaches, the technique can also be applied to multi-output functions.
引用
收藏
页码：290 / 293
页数：4
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