Implementing symmetric functions with hierarchical modules for stuck-at and path-delay fault testability

被引:6
|
作者
Rahaman, H [1 ]
Das, DK
Bhattacharya, BB
机构
[1] Bengal Engg & Sc Univ, Dept Informat Technol, Howrah 711103, India
[2] Jadavpur Univ, Dept Comp Sci & Engn, Kolkata 700032, India
[3] Indian Stat Inst, ACM Unit, Kolkata 700108, India
关键词
path-delay fault; stuck-at fault; symmetric Boolean function; synthesis-for-testability; unate function; universal tests;
D O I
10.1007/s10836-006-6674-3
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A technique for implementing totally symmetric Boolean functions using hierarchical modules is presented. First, a simple cellular module is designed for synthesizing unate symmetric functions. The structure is universal, admits a recursive design, and uses only 2-input AND-OR gates. A universal test set of size (n(2)/8 + 3n/4) for detecting all single stuck-at faults can be easily determined for ail n-input module, where n = 2(k), k >= 3. General symmetric functions are then realized following a unate decomposition method. The synthesis procedure guarantees full robust path-delay fault testability in the circuit. Experimental results on several symmetric functions reveal that the hardware cost of the proposed design is low, and the number of paths in the Circuit is reduced significantly compared to those of earlier designs. Results on circuit area and delay for a few benchmark examples are also reported.
引用
收藏
页码:125 / 142
页数:18
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