A 44 GHz 0.18μm CMOS superharmonic frequency divider

被引：0

作者：

Luo, Tang-Nian ^{[1
]}

Chen, Yi-Jan Emery ^{[1
]}

机构：

[1] Natl Taiwan Univ, Dept Elect Engn, Grad Inst Elect Engn, Taipei 10764, Taiwan

来源：

2007 IEEE/MTT-S INTERNATIONAL MICROWAVE SYMPOSIUM DIGEST, VOLS 1-6 | 2007年

关键词：

CMOS; divide-by-four; frequency divider; harmonic locking; millimeter-wave; low power;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper presents a low power 44 GRz 0.18 mu m CMOS superharmonic frequency divider. The superharmonic locking technique is proposed to perform direct divide-by-four operation. The integrated circuit was implemented in the commercial 0.18 mu m CMOS technology. Operated at 1.2 V, the frequency divider consumes only 1.8 mW of power. The measured locking range of the frequency divider is 200 MHz. By applying varactor tuning, the operating range of the divider can be extended to 2.14 GHz. The chip occupied 0.77mm x 0.8mm of silicon area including the testing pads.

引用

页码：1404 / 1407

页数：4

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