13 GHz Programmable Frequency Divider in 65 nm CMOS

被引：0
|
作者：
Kang, Jian [1 ]
Qin, Peng [1 ]
Li, Xiaoyong [1 ]
Mo, Tingting [1 ]
机构：
[1] Shanghai Jiao Tong Univ, Ctr Analog RF Integrated Circuits CARFIC, Sch Microelect, Shanghai 200240, Peoples R China
来源：
2012 IEEE 11TH INTERNATIONAL CONFERENCE ON SOLID-STATE AND INTEGRATED CIRCUIT TECHNOLOGY (ICSICT-2012) | 2012年
关键词：
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
This paper presents a CMOS high speed frequency divider which can operate at up to 13GHz. The divider core is composed of a divide by 8/9 dual modulus prescaler and a programmable digital counter. The divide by 8/9 dual modulus prescaler is realized by CML structure which operates around 6GHz. The digital counter is composed of logic gates and TSPC D flip-flops which operate at around 700MHz. The total division ratio is programmable and controlled by the input to the digital counter. The proposed frequency divider is designed and simulated in a 65 nm CMOS process and is capable of working robustly over the process, voltage supply, and temperature (P.V.T) variations.
引用
下载
收藏
页码：1406 / 1408
页数：3
相关论文
共 50 条
  • [1] Design of a 24 GHz Programmable Frequency Divider in 65-nm CMOS Process
    Bao, Huagui
    Li, Zhiqun
    Li, Qin
    Wang, Zhigong
    PROCEEDINGS OF 3RD INTERNATIONAL CONFERENCE ON MULTIMEDIA TECHNOLOGY (ICMT-13), 2013, 84 : 1854 - 1861
  • [2] A Novel Design of a 47GHz Programmable Frequency Divider based on RLTSPC logic in 65nm CMOS
    Geng, Xinlin
    Xie, Qian
    Wang, Zheng
    CONFERENCE PROCEEDINGS OF 2018 IEEE ASIA PACIFIC CONFERENCE ON POSTGRADUATE RESEARCH IN MICROELECTRONICS AND ELECTRONICS (PRIMEASIA 2018), 2018, : 32 - 34
  • [3] 81.5-85.9 GHz injection-locked frequency divider in 65 nm CMOS
    Cho, L. -C.
    Tsai, K. -H.
    Hung, C. -C.
    Liu, S. -I.
    ELECTRONICS LETTERS, 2008, 44 (16) : 966 - 968
  • [4] A 198.9GHz-to-201.0GHz Injection-Locked Frequency Divider in 65nm CMOS
    Lin, Bo-Yu
    Lee, I-Ting
    Wang, Chiao-Hsing
    Liu, Shen-Iuan
    2010 SYMPOSIUM ON VLSI CIRCUITS, DIGEST OF TECHNICAL PAPERS, 2010, : 49 - +
  • [5] 50 GHz static frequency divider in 130 nm CMOS
    Mo, Y.
    Skafidas, E.
    Evans, R.
    Mareels, I.
    ELECTRONICS LETTERS, 2008, 44 (04) : 285 - 287
  • [6] A 132.7-to-143.5GHz Injection-Locked Frequency Divider in 65nm CMOS
    Lin, Bo-Yu
    Liu, Shen-Iuan
    2009 SYMPOSIUM ON VLSI CIRCUITS, DIGEST OF TECHNICAL PAPERS, 2009, : 230 - +
  • [7] A power-efficient 14.8-GHz CMOS programmable frequency divider with quadrature outputs in 40-nm CMOS process
    Sen Huang
    Shengxi Diao
    Fujiang Lin
    Analog Integrated Circuits and Signal Processing, 2017, 93 : 189 - 196
  • [8] A power-efficient 14.8-GHz CMOS programmable frequency divider with quadrature outputs in 40-nm CMOS process
    Huang, Sen
    Diao, Shengxi
    Lin, Fujiang
    ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING, 2017, 93 (02) : 189 - 196
  • [9] Programmable low-frequency divider in 180-nm CMOS technology
    Tomic, Dubravko
    Mikulic, Josip
    Schatzberger, Gregor
    Fellner, Johannes
    Baric, Adrijan
    2020 43RD INTERNATIONAL CONVENTION ON INFORMATION, COMMUNICATION AND ELECTRONIC TECHNOLOGY (MIPRO 2020), 2020, : 89 - 92
  • [10] A 3.5 mW programmable high speed frequency divider for a 2.4 GHz CMOS frequency synthesizer
    Argüello, AMG
    Navarro, J
    Van Noije, W
    SBCCI 2005: 18TH SYMPOSIUM ON INTEGRATED CIRCUITS AND SYSTEMS DESIGN, PROCEEDINGS, 2005, : 144 - 148
12345