Self-Balancing DC-link Capacitor Voltages in Seven-Level Inverter using Selective Harmonics Elimination PWM

被引:0
|
作者
Imarazene, Khoukha [1 ]
Berkouk, El Madjid [2 ]
Chekireb, Hachemi [2 ]
机构
[1] USTHB, Elect & Ind Syst Lab, Algiers, Algeria
[2] ENP, Control Proc Lab, Algiers, Algeria
关键词
Multilevel inverter; SHEPWM; Redundant states; Self-balancing;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In order to avoid the use of an additional circuit to balance the six capacitor voltages of the seven level NPC inverter, redundant states are exploited. The study is so complex because of the huge number of vectors. 720 cases are studied using the selective harmonics elimination PWM instead of space vector PWM. The proposed algorithm is validated in the case of inductive AC load.
引用
收藏
页码:922 / 927
页数:6
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