Deep Learning Acceleration using Digital-based Processing In-Memory

被引:1
|
作者
Imani, Mohsen [1 ]
Gupta, Saransh [3 ]
Kim, Yeseong [2 ]
Rosing, Tajana [3 ]
机构
[1] UC Irvine, Dept Comp Sci, Irvine, CA 92697 USA
[2] DGIST, Dept Informat & Commun Engn, Daegu, South Korea
[3] Univ Calif San Diego, Dept Comp Sci & Engn, San Diego, CA USA
关键词
NEURAL-NETWORK;
D O I
10.1109/SOCC49529.2020.9524776
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Processing In-Memory (PIM) has shown a great potential to accelerate inference tasks of Convolutional Neural Network (CNN). However, existing PIM architectures do not support high precision computation. e.g., in floating point precision, which is essential for training accurate CNN models. In addition, most of the existing PIM approaches require analog/mixed-signal circuits, which do not scale, exploiting insufficiently reliable multi-hit Non-Volatile Memory (NVM). In this paper, we propose FloatPIM, a fully-digital scalable PIM architecture that accelerates CNN in both training and testing phases. FloatPlM natively supports floating-point representation, thus enabling accurate CNN training. FloatPIN I also enables fast communication between neighboring memory blocks to reduce internal data movement of the PIM architecture. We break the CNN computation into computing and data transfer modes. In computing mode, all blocks are processing a part of CNN training/testing in parallel, while in data transfer mode Float-PIM enables fast and row-parallel communication between the neighbor blocks. Our evaluation shows that FloatPIM training is on average 303.2x and 48.6x (4.3x and I5.8x) faster and more energy efficient as compared to GTX 1080 GPU (PipeLayer [1] NM accelerator).
引用
收藏
页码:123 / 128
页数:6
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