共 50 条
- [1] A new single-phase cascaded multilevel inverter topology with reduced number of switches and voltage stress [J]. INTERNATIONAL TRANSACTIONS ON ELECTRICAL ENERGY SYSTEMS, 2020, 30 (02):
- [2] A New Cascaded Multilevel Converter Topology with Reduced Number of Components [J]. 2017 IEEE INTERNATIONAL CONFERENCE ON POWER, CONTROL, SIGNALS AND INSTRUMENTATION ENGINEERING (ICPCSI), 2017, : 539 - 543
- [3] New Cascaded Multilevel Inverter Topology with Reduced Number of Switches and Sources [J]. 2013 8TH INTERNATIONAL CONFERENCE ON ELECTRICAL AND ELECTRONICS ENGINEERING (ELECO), 2013, : 97 - 101
- [6] A New Topology for Cascaded Multilevel Inverters with Reduced Number of Power Electronic Switches [J]. 2016 7TH POWER ELECTRONICS AND DRIVE SYSTEMS & TECHNOLOGIES CONFERENCE (PEDSTC), 2016, : 165 - 170
- [7] A New Cross Switched Cascaded Multilevel Inverter Topology with Reduced Number of Switches [J]. 2016 IEEE 7TH POWER INDIA INTERNATIONAL CONFERENCE (PIICON), 2016,
- [8] A New Multilevel Converter with Granular Voltage Steps and Reduced Number of Switches [J]. IECON 2015 - 41ST ANNUAL CONFERENCE OF THE IEEE INDUSTRIAL ELECTRONICS SOCIETY, 2015, : 2294 - 2299
- [9] New Grid-tied Cascaded Multilevel Inverter Topology with Reduced Number of Switches [J]. 2017 52ND INTERNATIONAL UNIVERSITIES POWER ENGINEERING CONFERENCE (UPEC), 2017,