On-Chip Power Noise Measurements of High-Frequency CMOS Digital Circuits

被引：0
|
作者：
Matsuno, Tetsuro [1 ]
Nagata, Makoto [1 ]
机构：
[1] Kobe Univ, Dept Comp Sci & Syst Engn, Nada Ku, Kobe, Hyogo 6578501, Japan
来源：
2009 INTERNATIONAL SOC DESIGN CONFERENCE (ISOCC 2009) | 2009年
关键词：
D O I：
10.1109/SOCDC.2009.5423904
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
On-chip power and substrate noise measurements were performed on shift registers in a 90-nm CMOS technology, with operating frequencies ranging from 100 MHz up to 1.2 GHz. Combined on-chip digitization and off-chip timing generation achieves the effective measurement bandwidth as high as 1.3 GHz. It was experimentally observed that dynamic components of power noise decrease for the higher operating frequencies.
引用
收藏
页码：198 / 201
页数：4
相关论文
共 50 条
  • [31] Simulation of on-chip interconnection effects in CMOS circuits
    Piwowarska, E
    [J]. EXPERIENCE OF DESIGNING AND APPLICATION OF CAD SYSTEMS IN MICROELECTRONICS, 2001, : 246 - 249
  • [32] On-chip power noise reduction techniques in high performance SoC-based integrated circuits
    Popovich, M
    Friedman, EG
    Secareanu, R
    Harlin, OL
    [J]. IEEE INTERNATIONAL SOC CONFERENCE, PROCEEDINGS, 2005, : 309 - 312
  • [33] VCO phase noise and sideband spurs due to substrate noise generated by on-chip digital circuits
    Mendez, M. A.
    Osorio, J. F.
    Mateo, D.
    Aragones, X.
    Gonzalez, J. L.
    [J]. 2006 IEEE RADIO FREQUENCY INTEGRATED CIRCUITS (RFIC) SYMPOSIUM, DIGEST OF PAPERS, 2006, : 121 - +
  • [34] VCO phase noise and sideband spurs due to substrate noise generated by on-chip digital circuits
    Mendez, M. A.
    Osorio, J. F.
    Mateo, D.
    Aragones, X.
    Gonzalez, J. L.
    [J]. 2006 IEEE RADIO FREQUENCY INTEGRATED CIRCUITS SYMPOSIUM, 2006, : 101 - 104
  • [35] High-frequency noise in RF active CMOS mixers
    Heydari, P
    [J]. ASP-DAC 2004: PROCEEDINGS OF THE ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE, 2004, : 57 - 61
  • [36] NOISE IN DIGITAL DYNAMIC CMOS CIRCUITS
    LARSSON, P
    SVENSSON, C
    [J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1994, 29 (06) : 655 - 662
  • [37] Decreased effectiveness of on-chip decoupling capacitance in high-frequency operation
    Yamamoto, Hiroshi
    Davis, Jeffrey A.
    [J]. IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2007, 15 (06) : 649 - 659
  • [38] Silicon odometer: An on-chip reliability monitor for measuring frequency degradation of digital circuits
    Kim, Tae-Hyoung
    Persaud, Randy
    Kim, Chris H.
    [J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2008, 43 (04) : 874 - 880
  • [39] Effect of dummy fills on high-frequency characteristics of on-chip interconnects
    Tsuchiya, Akira
    Onodera, Hidetoshi
    [J]. 10TH IEEE WORKSHOP ON SIGNAL PROPAGATION ON INTERCONNECTS, PROCEEDINGS, 2006, : 275 - +
  • [40] Chip-package codesign for high-frequency circuits and systems
    Lin, Jenshan
    [J]. IEEE Micro, 18 (04): : 24 - 32
12345