Device Modeling and System Simulation of Nanophotonic on-Chip Networks for Reliability, Power and Performance

被引:0
|
作者
Li, Zheng [1 ]
Mohamed, Moustafa [1 ]
Chen, Xi [1 ]
Mickelson, Alan [1 ]
Shang, Li [1 ]
机构
[1] Univ Colorado, Dept Elect Comp & Energy Engn, Boulder, CO 80309 USA
来源
PROCEEDINGS OF THE 48TH ACM/EDAC/IEEE DESIGN AUTOMATION CONFERENCE (DAC) | 2011年
基金
美国国家科学基金会;
关键词
Networks-on-Chip; Silicon photonics;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
The nanophotonic network promises improved communications between cores in many-core systems. This paper discusses a novel modeling and simulation methodology. This infrastrocture can compare performance, power consumption and reliability of nanophotonic network designs. Phenomenologically determined transfer-matrix device models are employed to characterize network performance under realistic multi-threaded applications, optical power transmission across the full wavelength-division multiplexing spectrom, and network reliability as affected by fabrication-induced process variation and run-time system thermal effects. Five recently proposed networks are analyzed to better elucidate advantages and limitations.
引用
收藏
页码:735 / 740
页数:6
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