A prototype of the read-out subsystem of the BESIII DAQ based on PowerPC

被引:4
|
作者
Ning, T [1 ]
Chu, YP
Ge, J
Zhao, JW
机构
[1] Univ Sci & Technol China, Dept Modern Phys, Hefei 230026, Peoples R China
[2] Chinese Acad Sci, Inst High Energy Phys, Beijing 100049, Peoples R China
来源
PLASMA SCIENCE & TECHNOLOGY | 2005年 / 7卷 / 05期
关键词
BESIII DAQ; readout system; single board computer; VMEbus; DMA transfer;
D O I
10.1088/1009-0630/7/5/021
中图分类号
O35 [流体力学]; O53 [等离子体物理学];
学科分类号
070204 ; 080103 ; 080704 ;
摘要
This article describes the prototype of the read-out subsystem which will be subject to the BESIII data acquisition system. According to the purpose of the BESIII, the event rate will be about 4000 Hz and the data rate up to 50 Mbytes/sec after Level I trigger. The read-out subsystem consists of some read-out crates and a read-out computer whose function is to initialize the hardware, to collect the event data from the front-end electronics after Level 1 trigger, to transfer data fragments to the computer in online form through two levels of computer pre-processing and high-speed network transmission. In this model, the crate level read-out implementation is based on the commercial single board computer MVME5100 running the VxWorks operating system.
引用
收藏
页码:3065 / 3068
页数:4
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