Novel Capacitorless 1T-DRAM Cell for 22-nm Node Compatible With Bulk and SOI Substrates

被引:35
|
作者
Rodriguez, Noel [1 ]
Cristoloveanu, Sorin [2 ]
Gamiz, Francisco [1 ]
机构
[1] Univ Granada, Dept Elect, Fac Sci, E-18071 Granada, Spain
[2] IMEP Minatec, F-38016 Grenoble, France
关键词
Advanced random-access memory (A-RAM); capacitorless; floating body (FB); MOSFET; simulation; silicon on insulator (SOI); zero-capacitor random-access memory (Z-RAM); single-transistor dynamic random-access memory (1T-DRAM); DRAM TECHNOLOGY; MOSFETS;
D O I
10.1109/TED.2011.2147788
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A new concept of multibody single-transistor dynamic-random-access-memory cell fully compatible with both standard bulk and silicon-on-insulator substrates is presented. Its novelty comes from the juxtaposition of two silicon films with opposed doping polarities (i.e., a p-n junction), which define a body partitioning for hole storage and current sense. The charge accumulated in the top body controls the current flowing through the bottom body. The scalability is ensured due to the suppression of the supercoupling effect, thus allowing the coexistence of electrons and holes in very thin transistors. Numerical simulations of electrostatics and dynamic operation show how the transient response of this device can be used for dynamic-memory applications, achieving attractive performance in terms of state discrimination and retention time in very scaled devices.
引用
收藏
页码:2371 / 2377
页数:7
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