An Effective Methodology for On-line Testing of Embedded Microprocessors

被引：0
|
作者：
Bernardi, P. [1 ]
Ciganda, L. [1 ]
Sanchez, E. [1 ]
Reorda, M. Sonza [1 ]
机构：
[1] Politecn Torino, Dipartimento Automat & Informat, I-10129 Turin, Italy
来源：
2011 IEEE 17TH INTERNATIONAL ON-LINE TESTING SYMPOSIUM (IOLTS) | 2011年
关键词：
On-line test; microprocessor test; hardware BIST;
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
Testing embedded microprocessors at mission time is nowadays a requirement in many SoC applications. In this paper, we introduce a methodology where the detection of operational faults is performed while the normal operations are temporarily suspended, by means of an ad-hoc HW module connected to the address, data and control buses of the microprocessor. This module behaves as a peripheral towards the microprocessor but is able to gain access to the bus over the system memory during the test. The proposed approach uses the microprocessor interrupt protocol to preserve the system state. Experimental results, gathered on a MIPS core, show the feasibility and effectiveness of the approach.
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页数：6
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