Fully parallel implementation of spiking neural networks on FPGA

被引:0
|
作者
Bako, L. [1 ]
Brassai, S. T. [1 ]
Szekely, I. [1 ]
机构
[1] Sapientia Hungarian Univ Transylvania, Targu Mures, Romania
关键词
neuromorphic neural networks; spiking neurons; simulation; hardware implementation; FPGA;
D O I
暂无
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
Neurobiological research has lead to the birth of third generation (neuromorphic) artificial neural networks. One of these models is based on the natural "spiking" neural behavior, which creates the basis of our research. Following the developed mathematical "pulse reactive" model, a novel FPGA built hardware spiking neuron is introduced along with a network of these new model neurons. The modular neuron structure, acquired signals and a process control application are given.
引用
收藏
页码:135 / 142
页数:8
相关论文
共 50 条
  • [1] Hardware Implementation of Spiking Neural Networks on FPGA
    Han, Jianhui
    Li, Zhaolin
    Zheng, Weimin
    Zhang, Youhui
    [J]. TSINGHUA SCIENCE AND TECHNOLOGY, 2020, 25 (04) : 479 - 486
  • [2] Hardware Implementation of Spiking Neural Networks on FPGA
    Jianhui Han
    Zhaolin Li
    Weimin Zheng
    Youhui Zhang
    [J]. Tsinghua Science and Technology, 2020, 25 (04) : 479 - 486
  • [3] An FPGA implementation of Bayesian inference with spiking neural networks
    Li, Haoran
    Wan, Bo
    Fang, Ying
    Li, Qifeng
    Liu, Jian K.
    An, Lingling
    [J]. FRONTIERS IN NEUROSCIENCE, 2024, 17
  • [4] Development of FPGA Toolbox for Implementation of Spiking Neural Networks
    Wu, QingXiang
    Liao, Xiaodong
    Huang, Xi
    Cai, Rongtai
    Cai, Jianyong
    Liu, Jinqing
    [J]. 2015 FIFTH INTERNATIONAL CONFERENCE ON COMMUNICATION SYSTEMS AND NETWORK TECHNOLOGIES (CSNT2015), 2015, : 806 - 810
  • [5] Reconstruction of a Fully Paralleled Auditory Spiking Neural Network and FPGA Implementation
    Deng, Bin
    Fan, Yanrong
    Wang, Jiang
    Yang, Shuangming
    [J]. IEEE TRANSACTIONS ON BIOMEDICAL CIRCUITS AND SYSTEMS, 2021, 15 (06) : 1320 - 1331
  • [6] FPGA Implementation of Izhikevich Spiking Neural Networks for Character Recognition
    Rice, Kenneth L.
    Bhuiyan, Mohammad A.
    Taha, Tarek M.
    Vutsinas, Christopher N.
    Smith, Melissa C.
    [J]. 2009 INTERNATIONAL CONFERENCE ON RECONFIGURABLE COMPUTING AND FPGAS, 2009, : 451 - +
  • [7] Toward the Optimal Design and FPGA Implementation of Spiking Neural Networks
    Guo, Wenzhe
    Yantir, Hasan Erdem
    Fouda, Mohammed E.
    Eltawil, Ahmed M.
    Salama, Khaled Nabil
    [J]. IEEE TRANSACTIONS ON NEURAL NETWORKS AND LEARNING SYSTEMS, 2022, 33 (08) : 3988 - 4002
  • [8] An FPGA Implementation of Convolutional Spiking Neural Networks for Radioisotope Identification
    Huang, Xiaoyu
    Jones, Edward
    Zhang, Siru
    Xie, Shouyu
    Furber, Steve
    Goulermas, Yannis
    Marsden, Edward
    Baistow, Ian
    Mitra, Srinjoy
    Hamilton, Alister
    [J]. 2021 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), 2021,
  • [9] FPGA implementation of sequence-to-sequence predicting spiking neural networks
    Ye, ChangMin
    Kornijcuk, Vladimir
    Kim, Jeeson
    Jeong, Doo Seok
    [J]. 2020 17TH INTERNATIONAL SOC DESIGN CONFERENCE (ISOCC 2020), 2020, : 322 - 323
  • [10] Spike Trains Encoding Optimization for Spiking Neural Networks Implementation in FPGA
    Fang, Biao
    Zhang, Yuhao
    Yan, Rui
    Tang, Huajin
    [J]. 2020 12TH INTERNATIONAL CONFERENCE ON ADVANCED COMPUTATIONAL INTELLIGENCE (ICACI), 2020, : 412 - 418