DiVer:: SAT-based model checking platform for verifying large scale systems

被引:0
|
作者
Ganai, MK [1 ]
Gupta, A [1 ]
Ashar, P [1 ]
机构
[1] NEC Labs Amer, Princeton, NJ 08540 USA
关键词
D O I
暂无
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
We present a SAT-based model checking platform (DiVer) based on robust and scalable algorithms that are tightly integrated for verifying large scale industry designs. DiVer houses various SAT-based engines each targeting capacity and performance issues inherent in verifying large designs. The engines with their respective roles are as follows: Bounded Model Checking (BMC) and Distributed BMC over a network of workstations for falsification, Proof-based Iterative Abstraction (PBIA) for model reduction, SAT-based Unbounded Model Checking and Induction for proofs, Efficient Memory Modeling (EMM) and its combination with PBIA in BMC for verifying embedded memory systems with multiple memories (with multiple ports and arbitrary initial state). Using several industrial case studies, we describe the interplay of these engines highlighting their contribution at each step of verification. DiVer has matured over 3 years and is being used extensively in several industry settings. Due to an efficient and flexible infrastructure, it provides a very productive verification environment for research and development.
引用
收藏
页码:575 / 580
页数:6
相关论文
共 50 条
  • [41] Interpolation and SAT-Based Model Checking Revisited: Adoption to Software Verification
    Dirk Beyer
    Nian-Ze Lee
    Philipp Wendler
    Journal of Automated Reasoning, 2025, 69 (1)
  • [42] SAT-Based Explicit LTLf Satisfiability Checking
    Li, Jianwen
    Rozier, Kristin Y.
    Pu, Geguang
    Zhang, Yueling
    Vardi, Moshe Y.
    THIRTY-THIRD AAAI CONFERENCE ON ARTIFICIAL INTELLIGENCE / THIRTY-FIRST INNOVATIVE APPLICATIONS OF ARTIFICIAL INTELLIGENCE CONFERENCE / NINTH AAAI SYMPOSIUM ON EDUCATIONAL ADVANCES IN ARTIFICIAL INTELLIGENCE, 2019, : 2946 - 2953
  • [43] Acceleration of SAT-based iterative property checking
    Grosse, D
    Drechsler, R
    CORRECT HARDWARE DESIGN AND VERIFICATION METHODS, PROCEEDINGS, 2005, 3725 : 349 - 353
  • [44] SAT-based Model Checking: Interpolation, IC3, and Beyond
    Grumberg, Orna
    Shoham, Sharon
    Vizel, Yakir
    SOFTWARE SYSTEMS SAFETY, 2014, 36 : 17 - 41
  • [45] Incremental deductive & inductive reasoning for SAT-based Bounded Model Checking
    Zhang, L
    Prasad, MR
    Hsiao, MS
    ICCAD-2004: INTERNATIONAL CONFERENCE ON COMPUTER AIDED DESIGN, IEEE/ACM DIGEST OF TECHNICAL PAPERS, 2004, : 502 - 509
  • [46] COMPLETE SAT-BASED MODEL CHECKING FOR CONTEXT-FREE PROCESSES
    Huang, Geng-Dian
    Wang, Bow-Yaw
    INTERNATIONAL JOURNAL OF FOUNDATIONS OF COMPUTER SCIENCE, 2010, 21 (02) : 115 - 134
  • [47] Parallel SAT-Based Parameterised Three-Valued Model Checking
    Timm, Nils
    Gruner, Stefan
    Sibanda, Prince
    MODEL CHECKING SOFTWARE, SPIN 2015, 2015, 9232 : 242 - 259
  • [48] An Optimized Intruder Model for SAT-based Model-Checking of Security Protocols
    Armando, Alessandro
    Compagna, Luca
    ELECTRONIC NOTES IN THEORETICAL COMPUTER SCIENCE, 2005, 125 (01) : 91 - 108
  • [49] Complete SAT-based model checking for context-free processes
    Huang, Geng-Dian
    Wang, Bow-Yaw
    AUTOMATED TECHNOLOGY FOR VERIFICATION AND ANALYSIS, PROCEEDINGS, 2007, 4762 : 51 - +
  • [50] On SAT-based bounded invariant checking of blackbox designs
    Herbstritt, Marc
    Becker, Bernd
    MTV 2005: SIXTH INTERNATIONAL WORKSHOP ON MICROPRESSOR TEST AND VERIFICATION: COMMON CHALLENGES AND SOLUTIONS, PROCEEDINGS, 2006, : 23 - +