Chaotic Oscillation-based BIST for CMOS Operational Amplifier

This paper presents chaotic oscillation-based built-in self-test (BIST) for CMOS operational amplifier. The proposed BIST technique is based on the use of designed operational amplifier (op-amp) in the unity gain buffer of discrete time chaotic oscillator as circuit under test (CUT) of BIST. The presented BIST detected faults by using a differentiation of chaotic output signal among fault free and faulty CUT. The circuit is simulated in 0.18 mu m CMOS technology. The simulation results on circuit-level are presented to examine the feasibility and efficiency to detecting faults in op-amp.