FICO: A fast instruction cache optimizer

被引：0
|
作者：
Garatti, M
机构：
来源：
SOFTWARE AND COMPILERS FOR EMBEDDED SYSTEMS | 2003年 / 2826卷
关键词：
D O I：
暂无
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
This paper shows the results obtained by FICO, a tool aimed at reducing instruction cache conflict misses. FICO reorders functions without requiring any program execution to gather profiling information. The control flow graph annotated with estimated execution frequencies is the actual input of the algorithm. The tool has been implemented as a post linking phase in a newly developed state-of-the-art commercial-quality compiler codesigned by STMicroelectronics and Hewlett-Packard for their embedded processor family LX. Experimental results show that FICO can provide a speed-up of about 8% on embedded applications.
引用
收藏
页码：388 / 402
页数：15
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