Eutectic solder bump process for ULSI flip chip technology

A novel eutectic solder bump process, which allows ULSI chips area array pad layout, has been developed. Straight side wall bumps as plated using a new nega-type photo resist and eutectic solder electroplating provide several advantages over conventional mushroom bumps. The novel developed process gives the bump height uniformity as renewed of less than 10 % within wafer. Composition measurements using ICP spectrometry have been performed to investigate the bump height dependence on solder compositions and the metal content dependence of a plating solution on the solder composition uniformity within wafer. Experimental results show that the plating solution with the total metal concentration of more than 60 g/l gives the uniformity at eutectic point of less than 3 % within wafer. In addition, we have confirmed that use of eutectic solder disk anode keeps the composition of a plating solution constant for long term product run.