Hardware Random Number Generator Using Josephson Oscillation and SFQ Logic Circuits

被引：5

作者：

Onomi, Takeshi ^{[1
]}

Mizugaki, Yoshinao ^{[2
]}

机构：

[1] Fukuoka Inst Technol, Fac Engn, Fukuoka 8110295, Japan

[2] Univ Electrocommun, Dept Engn Sci, Chofu, Tokyo 1828585, Japan

来源：

IEEE TRANSACTIONS ON APPLIED SUPERCONDUCTIVITY | 2020年 / 30卷 / 07期

关键词：

Timing jitter; Oscillators; Generators; Standards; Hardware; Logic gates; Delay lines; Josephson oscillation; random number generation; single flux quantum (SFQ) logic circuits; superconducting integrated circuits;

D O I：

10.1109/TASC.2020.2992248

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A hardware random number generator using Josephson oscillation and a few single flux quantum (SFQ) logic gates is presented. The logic circuit of the random number generator consists of one toggle flip flop and one and gate. A prototype random number generator is designed by logic cells based on a 2.5-kA/cm(2) Nb/AlOx/Nb integration process. The fundamental operation at a few hundred megahertz of the random number sampling frequency is confirmed by numerical simulation when a DC/SFQ converter is used for generating trigger signals. An additional delay line using an overdamped Josephson transmission line is used for increasing the timing jitter to get random numbers. The delay line makes it possible for the random number generator to operate over 1 GHz. To confirm the fundamental operation of the circuit, a primitive SFQ random number generator is fabricated using the AIST standard process with 2.5-kA/cm(2) Nb/AlOx/Nb junctions and the standard logic cell library. A random number generation based on a low-speed functional test is successfully confirmed.

引用

页数：5

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