Power and area efficient column-parallel ADC architectures for CMOS image sensors

被引：7

作者：

Snoeij, Martijn F. ^{[1
]}

Theuwissen, Albert J. P. ^{[1
,2
]}

Huijsing, Johan H. ^{[1
]}

Makinwa, Kofi A. A. ^{[1
]}

机构：

[1] Delft Univ Technol, Elect Instrumentat Lab DIMES, NL-2600 AA Delft, Netherlands

[2] DALSA Semicond, Eindhoven, Netherlands

来源：

2007 IEEE SENSORS, VOLS 1-3 | 2007年

关键词：

D O I：

10.1109/ICSENS.2007.4388451

中图分类号：

TP18 [人工智能理论];

学科分类号：

081104 ; 0812 ; 0835 ; 1405 ;

摘要：

The ever-increasing resolution of CMOS imagers has had a profound impact on their analog readout electronics, and, in particular, on their ADC architecture. This paper gives an overview of the development of column-parallel ADCs that enable the high-speed and power-efficient readout of high-resolution CMOS imagers. In particular, the recently proposed multiple-ramp single-slope (MRSS) ADC will be discussed.

引用

页码：523 / 526

页数：4

共 50 条

[31] A 12-Bit Column-Parallel Two-Step Single-Slope ADC With a Foreground Calibration for CMOS Image Sensors
Zhang, Qihui
Ning, Ning
Li, Jing
Yu, Qi
Wu, Kejun
Zhang, Zhong
IEEE ACCESS, 2020, 8 : 172467 - 172480
[32] Column-Parallel Correlated Multiple Sampling Circuits for CMOS Image Sensors and Their Noise Reduction Effects
Suh, Sungho
Itoh, Shinya
Aoyama, Satoshi
Kawahito, Shoji
SENSORS, 2010, 10 (10) : 9139 - 9154
[33] A Low-Noise Area-Efficient Column-Parallel ADC With an Input Triplet for a 120-dB High Dynamic Range CMOS Image Sensor
Hsu, Pai-Hsiang
Lee, Yueh-Ru
Chen, Chia-Hung
Hung, Chung-Chih
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 2023, 31 (12) : 1939 - 1949
[34] Column-Parallel Digital Correlated Multiple Sampling for Low-Noise CMOS Image Sensors
Chen, Yue
Xu, Yang
Mierop, Adri J.
Theuwissen, Albert J. P.
IEEE SENSORS JOURNAL, 2012, 12 (04) : 793 - 799
[35] An Area-Efficient Column-Parallel Digital Decimation Filter With Pre-BWI Topology for CMOS Image Sensor
Tang, Fang
Wang, Zhongjie
Xia, Yingjun
Liu, Fan
Zhou, Xichuan
Hu, Shengdong
Lin, Zhi
Bermak, Amine
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2018, 65 (08) : 2524 - 2533
[36] A 10-Bit Column-Parallel Single Slope ADC Based on Two-Step TDC with Error Calibration for CMOS Image Sensors
Xu, Jiangtao
Yu, Jing
Huang, Fujun
Nie, Kaiming
JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS, 2015, 24 (04)
[37] An 11-bit low power column-parallel single slope ADC with comparator toggle prediction technique for CMOS image sensor
Shi, Xiaolin
Li, Shaomeng
Nie, Kaiming
Microelectronics Journal, 2024, 153
[38] A 19-bit column-parallel folding-integration/ cyclic cascaded ADC with a pre-charging technique for CMOS image sensors
Wang, Tongxi
Seo, Min-Woong
Yasutomi, Keita
Kawahito, Shoji
IEICE ELECTRONICS EXPRESS, 2017, 14 (02): : 1 - 12
[39] A Low-Power Column-Parallel σΔ ADC With Shared OTAs and Single-Bit-BWI Decimation Filter for CMOS Image Sensor
Wang, Zhongjie
Ma, Qiyun
Yang, Tongbei
Lin, Zhi
Bermak, Amine
Tang, Fang
IEEE TRANSACTIONS ON ELECTRON DEVICES, 2022, 69 (06) : 2979 - 2985
[40] A distributed ramp signal generator of column-parallel single-slope ADCs for CMOS image sensors
Imai, Kaita
Yasutomi, Keita
Kagawa, Keiichiro
Kawahito, Shoji
IEICE ELECTRONICS EXPRESS, 2012, 9 (24): : 1893 - 1899

← 1 2 3 4 5 →