A Simple Novel Method to Reduce Common Mode Voltage in Space Vector Pulse Width Modulation Driving Three-Phase Inverter

被引：0

作者：

Lee, YongKeun ^{[1
]}

Lee, JangHyeon ^{[2
]}

Lee, JangWook ^{[3
]}

机构：

[1] Seoul Natl Univ Sci & Technol, Seoul, South Korea

[2] Korea Univ, Seoul, South Korea

[3] Korea Adv Inst Sci & Technol, Daejeon, South Korea

来源：

2018 INTERNATIONAL CONFERENCE ON ELECTRONICS, INFORMATION, AND COMMUNICATION (ICEIC) | 2018年

关键词：

CMV; SVPWM; IGBT; AZSVPWM; DPWM;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper proposes a simple novel method to eliminate maximum common mode voltage (CMV) occurred at unavoidable zero vector applied in space vector pulse width modulation (SVPWM) driving three-phase voltage source inverter (VSI). Instead of switch OFF upper or lower three IGBTs (ppp) or (nnn) for zero vector, our proposed method is to switch OFF all six IGBTs. It results in CMV being zero at zero vector switching from 1/2 nu_dc.

引用

页码：469 / 472

页数：4

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