A technology compensated current reference in standard CMOS

被引：1
|
作者：
Eberlein, Matthias [1 ]
机构：
[1] Malaysia Microelect Solut, Cyberjaya 63000, Malaysia
来源：
ASICON 2007: 2007 7TH INTERNATIONAL CONFERENCE ON ASIC, VOLS 1 AND 2, PROCEEDINGS | 2007年
关键词：
D O I：
10.1109/ICASIC.2007.4415682
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
An accurate current reference that compensates also for process variations is presented and realized in a 0.18 mu m technology. This new concept allows tracking of oxide thickness in integrated MOS capacitors. The circuit uses SC-technique and adaptive biasing, together with inherent compensation. It is shown that 2-3% of accuracy over full process and temperature range can be achieved. Results for a different foundry are presented, too. The. resistorless design is simple and suitable for low voltage. Power consumption is only 7.7 mu A.
引用
收藏
页码：522 / 525
页数：4
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