Fill reduction techniques for circuit simulation

被引：3

作者：

Reissig, Gunther ^{[1
]}

机构：

[1] Tech Univ Berlin, Fakultat IV Fachgebiet Regelungssysteme, D-10587 Berlin, Germany

来源：

ELECTRICAL ENGINEERING | 2007年 / 90卷 / 02期

关键词：

sparse linear systems; fill reduction; pivot ordering;

D O I：

10.1007/s00202-007-0061-7

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

We investigate the performance of a combination of sophisticated local symmetric ordering methods with a simple symmetrization step on a test set of Jacobians obtained from modified nodal equations. It is demonstrated that using such ordering heuristics as a replacement for Markowitz' algorithm may accelerate circuit simulation significantly.

引用

页码：143 / 146

页数：4

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