Parasitics reduction for analog circuit simulation

The modeling of interconnect lines using lumped elements results in large nets that in general can only be handled after a reduction of these parasitic elements. This paper presents an alternative to the Pade via Lanczos methods like SymPVL which allows for a direct error estimation by working in the time domain instead of approximating the transfer function. The proposed method uses a direct eigenvalue calculation which is performed with the Jacobi Davidson algorithm.