Design, Fabrication and Characterization of Low-Cost Glass Interposers with Fine-Pitch Through-Package-Vias

被引:0
|
作者
Sukumaran, Vijay [1 ]
Bandyopadhyay, Tapobrata [1 ]
Chen, Qiao [1 ]
Kumbhat, Nitesh [1 ]
Liu, Fuhan [1 ]
Pucha, Raghu [1 ]
Sato, Yoichiro [2 ]
Watanabe, Mitsuru [2 ]
Kitaoka, Kenji [2 ]
Ono, Motoshi [2 ]
Suzuki, Yuya [3 ]
Karoui, Choukri [4 ]
Nopper, Christian [4 ]
Swaminathan, Madhavan [1 ]
Sundaram, Venky [1 ]
Tummala, Rao [1 ]
机构
[1] Georgia Inst Technol, Syst Packaging Res Ctr 3D, 813 Ferst Dr NW, Atlanta, GA 30332 USA
[2] Asahi Glass Inc, Tokyo, Japan
[3] Zeon Corp, Tokyo, Japan
[4] STMicrolectron, Tours, France
关键词
Glass interposer; laser ablation; Electrical design; fine line wiring; through package via; mechanical modeling;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper demonstrates thin glass interposers with fine pitch through package vias (TPV) as a low cost and high I/O substrate for 3D integration. Interposers for packaging of ULK and 3D-ICs need to support large numbers of die to die interconnections with I/O pitch below 50 mu m. Current organic substrates are limited by CTE mismatch, wiring density, and poor dimensional stability. Wafer based silicon interposers can achieve high I/Os at fine pitch, but are limited by high cost. Glass is an ideal interposer material due to its insulating property, large panel availability and CTE match to silicon. The main focus of this work is on a) electrical and mechanical design, b) TPV and fine line formation and c) integration process and electrical characterization of thin glass interposers. This work for the first time demonstrates high throughput formation of 30 mu m pitch TPVs in ultrathin glass using a parallel laser process. An integration process was demonstrated for glass interposer with polymer build-up layers on both sides. The glass interposer had stable electrical properties up to 20GHz and low insertion loss of less than 0.15dB was measured for TPVs at 9GHz.
引用
收藏
页码:583 / 588
页数:6
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