Design of CMOS Instrumentation Amplifier Using gm/ID Methodology

被引：0

作者：

Eswaran, Deepan ^{[1
]}

Devi, J. Dhurga ^{[1
]}

Ramakrishna, P., V ^{[1
]}

机构：

[1] Anna Univ, Coll Engn, Dept Elect & Commun Engn, Madras, Tamil Nadu, India

来源：

2014 INTERNATIONAL CONFERENCE ON CIRCUITS, COMMUNICATION, CONTROL AND COMPUTING (I4C) | 2014年

关键词：

Current Feedback Instrumentation Amplifier; g(m)/I-D Methodology; CMOS; high CMRR;

D O I：

暂无

中图分类号：

TP301 [理论、方法];

学科分类号：

081202 ;

摘要：

This paper describes the design of an indirect current feedback Instrumentation Amplifier (IA). Transistor sizing plays a major role in achieving the desired gain, the Common Mode Rejection Ratio (CMRR) and the bandwidth of the Instrumentation Amplifier. A g(m)/I-D based design methodology is employed to design the functional blocks of the IA. It links the design variables of each functional block to its target specifications and is used to develop design charts that are used to accurately size the transistors. The IA thus designed achieves a voltage gain of 31dB with a bandwidth 1.2MHz and a CMRR of 87dB at 1MHz. The circuit design is carried out using 0.18 mu m CMOS process.

引用

页码：29 / 32

页数：4

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