A pipelined serial data receiver with oversampling techniques for high-speed data communications

被引：1

作者：

Lin, YH ^{[1
]}

Tu, SHL ^{[1
]}

机构：

[1] Fu Jen Catholic Univ, Dept Elect Engn, Taipei 24205, Taiwan

来源：

2003 IEEE CONFERENCE ON ELECTRON DEVICES AND SOLID-STATE CIRCUITS | 2003年

关键词：

D O I：

10.1109/EDSSC.2003.1283507

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

In this paper, we propose a novel oversampling receiver to achieve NRZI (Non-Return-to-Zero-Inverted) data recovery for serial link communications. Adopting feed-forward not conventional PLL (Phase-Locked Loop) feed-back operation is quite suitable for high-bandwidth applications. The employment of byte-level pipelined architecture greatly reduces the complexity of the system clock configuration. Moreover, the characteristic of high data deviation tolerance was indicated from the experimental results.

引用

下载

页码：167 / 170

页数：4

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