Impact of down scaling on high frequency noise performance of bulk and SOI MOSFETs.

被引：0

作者：

Dambrine, G ^{[1
]}

Raynaud, C ^{[1
]}

Vanmackelberg, M ^{[1
]}

Danneville, F ^{[1
]}

Pailloncy, G ^{[1
]}

Lepilliet, S ^{[1
]}

Raskin, JP ^{[1
]}

机构：

[1] IEMN, F-59652 Villeneuve Dascq, France

来源：

NOISE IN DEVICES AND CIRCUITS | 2003年 / 5113卷

关键词：

D O I：

10.1117/12.497141

中图分类号：

O42 [声学];

学科分类号：

070206 ; 082403 ;

摘要：

Parameters limiting the: improvement of high frequency noise characteristics for deep submicron MOSFETs with the downscaling process of the channel gate length are analyzed experimentally and analytically. It is demonstrated that the intrinsic Pucel's noise P, R, C parameters are not strongly modified by the device scaling. The limitation of the noise performance versus the downscaling process is mainly related to the frequency performance (f(max)) of the device. It is demonstrated that for MOSFETs with optimized source, drain and gate access, the degradation of the maximum oscillation frequency is mainly related to the increase of the parasitic feedback gate-to-drain capacitance and output conductance with the physical channel length reduction. Optimization of these internal parameters is needed to further improve the high frequency noise performance of ultra deep submicron MOSFETs. But the window of optimization for sub-100 nm gate length MOSFETs will be very narrow.

引用

页码：105 / 119

页数：15

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