Low-Phase-Noise Wide-Frequency-Range Ring-VCO-Based Scalable PLL with Subharmonic Injection Locking in 0.18 μm CMOS

被引：0

作者：

Lee, Sang Yeop ^{[1
]}

Amakawa, Shuhei ^{[1
]}

Ishihara, Noboru ^{[1
]}

Masu, Kazuya ^{[1
]}

机构：

[1] Tokyo Inst Technol, Integrated Res Inst, Midori Ku, Yokohama, Kanagawa 2268503, Japan

来源：

2010 IEEE MTT-S INTERNATIONAL MICROWAVE SYMPOSIUM DIGEST (MTT) | 2010年

关键词：

Phase-locked loops; injection locked oscillators; ring VCO; phase noise; CMOS integrated circuits; OSCILLATOR;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A low-phase-noise ring-VCO-based PLL (frequency tuning range: 0.65-1.6 GHz) with subharmonic injection locking was realized (PLL area: 0.1 mm(2)) by adopting 0.18 mu m CMOS technology and combining pMOS resistive loads with a circuit for shifting bias levels; this makes the rail-to-rail range of voltages usable as control voltages. For a 90-MHz input reference signal, without injection locking, the 0.2-MHz-offset phase noise was -108 dBc/Hz (PLL output frequency: 1.44GHz = 16 x 90MHz); with injection locking, the noise was -122 dBclHz (spurious level: -35 dBc; power consumption from a 1.8V power supply: 39mW).

引用

页码：1178 / 1181

页数：4

共 35 条

[1] Low-Phase-Noise Wide-Frequency-Range Differential Ring-VCO with Non-Integral Subharmonic Locking in 0.18 μm CMOS
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[2] Low-Phase-Noise Wide-Frequency-Range Differential Ring-VCO with Non-Integral Subharmonic Locking in 0.18 μm CMOS
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