A symbolic approach for mixed-signal model checking

被引：0

作者：

Jesser, Alexander ^{[1
]}

Hedrich, Lars ^{[1
]}

机构：

[1] Goethe Univ Frankfurt, Dept Comp Sci, D-60325 Frankfurt, Germany

来源：

2008 ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE, VOLS 1 AND 2 | 2008年

关键词：

D O I：

暂无

中图分类号：

TP [自动化技术、计算机技术];

学科分类号：

0812 ;

摘要：

In this paper we firstly introduce a novel symbolic model checker (MScheck) for mixed-signal circuits. MScheck is capable to conflate the continuous behavior, typical for analog designs, and the discrete behavior in the digital domain for formal verification. Tinting information of both systems will be symbolically stored within multi terminal binary decision diagrams (MTBDDs) for the entire verification procedure. The effectiveness of our approach is demonstrated on a phase locked loop (PLL) by formal verification of the locking property.

引用

页码：345 / 350

页数：6

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