ILP Based Multithreaded Code Generation for Simulink Model

被引:5
|
作者
Huang, Kai [1 ,3 ]
Yu, Min [1 ]
Zhang, Xiaomeng [1 ]
Zheng, Dandan [1 ]
Xiu, Siwen [1 ]
Yan, Rongjie [2 ]
Huang, Kai [1 ,3 ]
Liu, Zhili [4 ]
Yan, Xiaolang [1 ]
机构
[1] Zhejiang Univ, Inst VLSI Design, Hangzhou, Zhejiang, Peoples R China
[2] Chinese Acad Sci, Inst Software, Comp Sci Lab, Beijing 100864, Peoples R China
[3] Tech Univ Munich, Dept Informat 6, D-80290 Munich, Germany
[4] Hangzhou C SKY Co Ltd, Hangzhou, Zhejiang, Peoples R China
来源
基金
美国国家科学基金会;
关键词
code generation; ILP; task mapping; scheduling; Simulink; ARCHITECTURAL SUPPORT; MULTIPROCESSOR SOC; DESIGN FLOW;
D O I
10.1587/transinf.2014PAP0015
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
The increasing complexity of embedded applications and the prevalence of multiprocessor system-on-chip (MPSoC) introduce a great challenge for designers on how to achieve performance and programmability simultaneously in embedded systems. Automatic multithreaded code generation methods taking account of performance optimization techniques can be an effective solution. In this paper, we consider the issue of increasing processor utilization and reducing communication cost during multithreaded code generation from Simulink models to improve system performance. We propose a combination of three-layered multithreaded software with Integer Linear Programming (ILP) based design-time mapping and scheduling policies to get optimal performance. The hierarchical software with a thread layer increases processor usage, while the mapping and scheduling policies formulate a group of integer linear programming formulations to minimize communication cost as well as to maximize performance. Experimental results demonstrate the advantages of the proposed techniques on performance improvements.
引用
收藏
页码:3072 / 3082
页数:11
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