Semiparallel rank order filtering in analog VLSI

This paper demonstrates two related techniques for spatially encoding rank in an unlimited array of analog inputs. During a particular read cycle, a single output of the array is low, indicating that the corresponding input holds the rank related to the current read cycle, Ranks are computed in succession, in decreasing order, and may not be skipped ill the rank filtering process. Since a single rank is computed in parallel among all input elements, but different ranks can only be computed in different read cycles across timer we fall these rank order filtering techniques semiparallel, indicating their dual massively parallel and sequential operation. The two analog VLSI implementations we present here offer the low power (2.5 muW) and compact (19 and 21 small transistors) advantages of analog VLSI while providing sufficient resolution (5 mV) and speed (100 ranks per second) to be used at frame rates greater than 30 frames per second in arrays where up to 20 inputs are desired.