Cost-effective and Accurate Solution for Jitter Performance Test in High-speed Serial Links

被引:0
|
作者
Lu, Ming [1 ]
机构
[1] Applicat Dev Ctr Verigy, Shanghai, Peoples R China
关键词
D O I
10.1149/1.3567690
中图分类号
O646 [电化学、电解、磁化学];
学科分类号
081704 ;
摘要
With the increasing demand for faster data communication, the data rate of communication systems has reached in the gigahertz range and higher. To accurately quantifying the transmission quality of high-speed I/Os with acceptable test time in production becomes one big challenge to ATE test engineers. The major hindrance is to fully measure jitter related specs accurately will lead to excessive cost of test (e.g., capital investment, time-to-market, test time), while BIST loopback testing can not promise a result with a high confidence level. This paper proposes one comprehensive solution for at-speed jitter performance testing on ATE, which includes jitter histogram testing, random jitter / deterministic jitter separation and jitter stardust testing. This solution has been implemented in volume production of a real device and the result shows its high accuracy and cost effectiveness.
引用
收藏
页码:907 / 912
页数:6
相关论文
共 50 条
  • [1] Jitter measurements of high-speed serial links
    Kossel, MA
    Schmatz, ML
    [J]. IEEE DESIGN & TEST OF COMPUTERS, 2004, 21 (06): : 536 - 543
  • [2] Jitter in high-speed serial and parallel links
    Hanumolu, PK
    Casper, B
    Mooney, R
    Wei, GY
    Moon, UK
    [J]. 2004 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL 4, PROCEEDINGS, 2004, : 425 - 428
  • [3] Accurate Jitter Decomposition in High-Speed Links
    Duan, Yan
    Chen, Degang
    [J]. 2017 IEEE 35TH VLSI TEST SYMPOSIUM (VTS), 2017,
  • [4] Jitter test in production for high speed serial links
    Cai, Y
    [J]. INTERNATIONAL TEST CONFERENCE 2003, PROCEEDINGS, 2003, : 1312 - 1312
  • [5] HSE: a cost-effective, high-speed automation solution
    Glanzer, DA
    [J]. HYDROCARBON PROCESSING, 2000, 79 (06): : F15 - F17
  • [6] Analysis of PLL clock jitter in high-speed serial links
    Hanumolu, PK
    Casper, B
    Mooney, R
    Wei, GY
    Moon, UK
    [J]. IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2003, 50 (11) : 879 - 886
  • [7] Jitter and signaling test for high-speed links - An invited paper
    Li, Mike P.
    [J]. PROCEEDINGS OF THE IEEE 2006 CUSTOM INTEGRATED CIRCUITS CONFERENCE, 2006, : 65 - 72
  • [8] Fast and Accurate Decomposition of Deterministic Jitter Components in High-Speed Links
    Duan, Yan
    Chen, Degang
    [J]. IEEE TRANSACTIONS ON ELECTROMAGNETIC COMPATIBILITY, 2019, 61 (01) : 217 - 225
  • [9] Comparison of Jitter Decomposition Methods for BER Analysis of High-Speed Serial Links
    Erb, Stefan
    Pribyl, Wolfgang
    [J]. PROCEEDINGS OF THE 13TH IEEE SYMPOSIUM ON DESIGN AND DIAGNOSTICS OF ELECTRONIC CIRCUITS AND SYSTEMS, 2010, : 370 - 375
  • [10] An Accurate and Cost-Effective Jitter Measurement Technique Using a Single Test Frequency
    Wu, Minshun
    Chen, Degang
    Duan, Jingbo
    [J]. JOURNAL OF ELECTRONIC TESTING-THEORY AND APPLICATIONS, 2012, 28 (05): : 733 - 743