InAs Planar Nanowire Gate-All-Around MOSFETs on GaAs Substrates by Selective Lateral Epitaxy

被引:16
|
作者
Zhang, Chen [1 ]
Choi, Wonsik [1 ]
Mohseni, Parsian K. [1 ]
Li, Xiuling [1 ]
机构
[1] Univ Illinois, Dept Elect & Comp Engn, Urbana, IL 61822 USA
基金
美国国家科学基金会;
关键词
III-V MOSFETs; InAs; VLS growth; nanowire; selective lateral epitaxy; ELECTRON-MOBILITY;
D O I
10.1109/LED.2015.2429680
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
High indium content III-V materials are one of the most promising candidates for beyond Si CMOS technologies. We present InAs planar nanowire (NW) MOSFETs grown directly on a semi-insulating GaAs (100) substrate by the selective lateral epitaxy (SLE) method via the metal-seeded planar vapor-liquid-solid mechanism. Despite a similar to 7% lattice mismatch, in-plane and self-aligned single-crystal InAs NWs are grown epitaxially on GaAs. Such heterogeneous SLE provides a potential solution for the integration of different channel materials on one substrate. Gate-all-around MOSFET devices are fabricated by releasing the NW channel from the substrate through a combination of digital etching and selective etching processes. The device with a NW width of 30 nm and gate length of 350 nm shows an I-ON/I-OFF ratio of 10(4) and a peak transconductance of 220 mS/mm at V-ds = 0.5 V.
引用
收藏
页码:663 / 665
页数:3
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