Performance evaluation for electrical plate lead-free solder bumping on sapphire wafers

被引:0
|
作者
Yang, Zhiyuan [1 ]
机构
[1] Peregrine Semicond, San Diego, CA 92121 USA
关键词
D O I
暂无
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Electrical plating Lead-free Solder bumping process is quite common for silicon wafers in semiconductor industry, while for sapphire wafers there are still some technical issues to be encountered. Bumped wafer of unreasonable bumping structure has always been found bumps knocked-off after wafer singulation process which is a three-point breaking. Triple higher residual stress may be accumulated on sapphire wafer surface in comparison of that on silicon wafer, which may impact bumping reliability performance. How to choose UBM material and the bumping structure design become critical to this technology development project. Performance evaluation for the bumping process and the bumping structure design has been carried out, which is based on the volume production standpoint. It exhibited satisfactory results.
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页码:246 / 251
页数:6
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