Pulse density Hopfield Neural Network system with learning capability using FPGA

被引:0
|
作者
Maeda, Yutaka [1 ]
Fukuda, Yoshinori [1 ]
机构
[1] Kansai Univ, Dept Elect & Elect Engn, 3-3-35 Yamate Cho, Suita, Osaka 5648680, Japan
关键词
hardware implementation; pulse density; HNN; learning; simultaneous perturbation; FPGA;
D O I
暂无
中图分类号
TP39 [计算机的应用];
学科分类号
081203 ; 0835 ;
摘要
In this paper, we present a FPGA Hopfield Neural Network system with learning capability using the simultaneous perturbation learning rule. In the neural network, outputs and internal values are represented by pulse train. That is, analog Hopfield Neural Network with pulse frequency representation is considered. The pulse density representation and the simultaneous perturbation enable the system with learning capability to easily implement as a hardware system. Details of the design are described. Analog and digital examples are also shown to confirm a viability of the system configuration and the learning capability.
引用
收藏
页码:320 / +
页数:2
相关论文
共 50 条
  • [1] Pulse density recurrent neural network systems with learning capability using FPGA
    Department of Electrical and Electronic Engineering, Kansai University, 3-3-35 Yamate-cho, Suita 564-8680, Japan
    [J]. WSEAS Trans. Circuits Syst., 2008, 5 (321-330):
  • [2] FPGA implementation of pulse density Hopfield neural network
    Maeda, Yutaka
    Fukuda, Yoshinori
    [J]. 2007 IEEE INTERNATIONAL JOINT CONFERENCE ON NEURAL NETWORKS, VOLS 1-6, 2007, : 700 - 704
  • [3] FPGA placement by using Hopfield neural network
    Kos, Andrzej
    Nagorny, Zbigniew
    [J]. MICROELECTRONICS INTERNATIONAL, 2009, 26 (01) : 22 - 32
  • [4] FPGA implementation of a pulse density neural network with learning ability using simultaneous perturbation
    Maeda, Y
    Tada, T
    [J]. IEEE TRANSACTIONS ON NEURAL NETWORKS, 2003, 14 (03): : 688 - 695
  • [5] Pulse density neural network system using simultaneous perturbation learning rule
    Maeda, Y
    Nakazawa, A
    Kanata, Y
    [J]. 1997 IEEE INTERNATIONAL CONFERENCE ON NEURAL NETWORKS, VOLS 1-4, 1997, : 980 - 984
  • [6] FPGA implementation of a pulse density neural network using simultaneous perturbation
    Maeda, Y
    Tada, T
    [J]. IJCNN 2000: PROCEEDINGS OF THE IEEE-INNS-ENNS INTERNATIONAL JOINT CONFERENCE ON NEURAL NETWORKS, VOL III, 2000, : 296 - 301
  • [7] An analog neural network system with learning capability using simultaneous perturbation
    Maeda, Y
    Kusuhashi, T
    [J]. IEICE TRANSACTIONS ON INFORMATION AND SYSTEMS, 1999, E82D (12) : 1627 - 1633
  • [8] System identification using a Fourier/Hopfield neural network
    Karam, M
    Fadali, MS
    [J]. PROCEEDINGS OF THE 44TH IEEE 2001 MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1 AND 2, 2001, : 641 - 644
  • [9] FPGA implementation of Hopfield neural network with transcendental nonlinearity
    Yang, Songtao
    Min, Fuhong
    Yang, Xilin
    Ying, Jiajie
    [J]. NONLINEAR DYNAMICS, 2024, : 20537 - 20548
  • [10] FPGA implementation of programmable pulse mode neural network with on chip learning
    Damak, Alima
    Krid, Mohamed
    Masmoudi, Dorra Sellami
    Derbel, Nabil
    [J]. IEEE DTIS: 2006 INTERNATIONAL CONFERENCE ON DESIGN & TEST OF INTEGRATED SYSTEMS IN NANOSCALE TECHNOLOGY, PROCEEDINGS, 2006, : 159 - 164