Analytical model for the propagation delay of through silicon vias

被引：22

作者：

Khalil, DiaaEldin ^{[1
]}

Ismail, Yehea ^{[1
]}

Khellah, Muhammad ^{[2
]}

Karnik, Tanay ^{[2
]}

De, Vivek ^{[2
]}

机构：

[1] Northwestern Univ, EECS Dept, Evanston, IL 60208 USA

[2] Intel Corp, Circuits Res Lab, Santa Clara, CA USA

来源：

ISQED 2008: PROCEEDINGS OF THE NINTH INTERNATIONAL SYMPOSIUM ON QUALITY ELECTRONIC DESIGN | 2008年

关键词：

D O I：

10.1109/ISQED.2008.128

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper explores the modeling of the propagation delay of through silicon Was (TSVs) in 3D integrated circuits. The electrical characteristics and models of the TSVs are very crucial in enabling the analysis and CAD in 3D integrated circuits. In this paper, an analytical model for the propagation delay of the TSV as a function of its physical dimensions is proposed The presented analytical model is in great agreement with simulations using electromagnetic field solver and lossy transmission line circuit model. Compared to earlier interconnect models, the presented analytical model provides higher accuracy and fidelity in addition to its simplicity. Hence, the presented analytical model is very useful in the analysis of 3D integrated circuits.

引用

页码：553 / +

页数：2

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