A Real-Time FHD Learning-Based Super-Resolution System Without a Frame Buffer

被引：22
|
作者：
Yang, Ming-Che [1 ,2 ]
Liu, Kuan-Ling [1 ,2 ]
Chien, Shao-Yi [1 ,2 ]
机构：
[1] Natl Taiwan Univ, Grad Inst Elect Engn, Taipei 106, Taiwan
[2] Natl Taiwan Univ, Dept Elect Engn, Taipei 106, Taiwan
来源：
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS | 2017年 / 64卷 / 12期
关键词：
Super resolution; anchored neighborhood regression; real-time; FPGA;
D O I：
10.1109/TCSII.2017.2749336
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
This brief presents a real-time learning-based super-resolution (SR) system without a frame buffer. The system running on an Altera Stratix IV field programmable gate array can achieve output resolution of 1920 x 1080 (FHD) at 60 fps. The proposed architecture performs an anchored neighborhood regression algorithm that generates a high-resolution image from a low-resolution image input using only numbers of line buffers. This real-time system without a frame buffer makes it possible to integrate SR operation into image sensors or display drivers carrying out computational photography and display.
引用
收藏
页码：1407 / 1411
页数：5
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